In an array substrate, a thin film transistor is formed on a base substrate. A passivation layer is deposited on the thin film transistor, and a resin layer is deposited on the passivation layer. For connecting a pixel electrode to a drain electrode in the thin film transistor, a via is formed in the resin layer and the passivation layer, extending through both layers to the surface of the drain electrode. A pixel electrode material is then deposited in the via.